The demand for an enriched end-user experience and increased performance in next generation electronic applications is never ending, and it is a common trend for a wide spectrum of applications owing to different markets, like computing, mobile communication and automotive. For this reason wireless transceivers have become widespread components for nowadays electronics with a constant demand for power reduction and data-rate increase. Data-rates in wireless communications have been steadily increasing with on-chip processing rate and logic density both in network applications and in hard-disk interconnects. The data-rates are now exceeding 1-Gbps and are expected to grow exponentially in next years as new standards are released together with the enormous amount of unlicensed bandwidth in the E-Band spectrum (71-76 GHz and 81-86 GHz bands). The development of 5G communication systems is underway. Point-topoint wireless links in the E-Band can provide high data-rate, easily deployable, cheap and flexible Backhaul solutions, important enablers for the mobile network evolution towards 5G network. The development of CMOS/BiCMOS integrated transceivers for E-Band Backhaul applications can help reducing the cost and footprint of the equipment, but presents design challenges, mostly related to the use of adaptive spectrally-efficient high-order modulations, which mandate high linearity and low Phase-Noise. In example when employing 64- Quadrature Amplitude Modulation (64-QAM), very low Phase-Noise levels are required to limit Error Vector Magnitude (EVM) - i.e. less than -117 dBc/Hz at 1-MHz offset from f = 20 GHz carrier. In the frame of gigabit wireless systems, the work discussed in this thesis concerns with local-oscillator (LO) generation requirements for E-Band Backhaul applications spanning from the concept of the circuit to its implementation. Phase-Noise specifications for the frequency synthesizer are identified, and design and optimization of VCOs performance is proposed. A K-Band Class-C VCO is proposed as key block of the frequency synthesizer. It achieves ultra-low Phase-Noise performance, while still achieving a wide Tuning-Range (TR), essential feature in E-Band communication standards. The choice between CMOS Versus BJT devices is investigated and the impact of the intrinsic Base-Resistance (rb) in BJT-based VCOs is addressed. BJT-based VCO shows ∼2dB better Phase-Noise when compared to CMOS-based VCO and low supply is employed. When higher supply is leveraged, BJT-based VCO advantage is kept while CMOS-based VCO is not able to reach the targeted Tuning-Range due to thick oxide devices parasitics. The challenges of achieving such a low Phase-Noise are discussed in detail, with particular emphasis on the minimization of L/QT, inductor versus Quality-Factor ratio. Prototypes have been realized in a 55nm BiCMOS technology. Operated at 2.5 V supply with the largest amplitude allowed by reliability constraints, measurements show a Phase-Noise as low as -119 dBc/Hz at 1-MHz offset from a 20-GHz carrier with a Tuning-Range of 19% and Figure of Merit (FoM) of -187 dBc/Hz. Power consumption is 56 mW. This dissertation demonstrates advances over State-Of-The-Art primarily in terms of low Phase-Noise performance, and shows how the proposed circuit is suitable as local-oscillator building block in direct-conversion E-Band Backhaul transceivers. The work has been performed in the Analog Integrated Circuits Laboratory (AICLab) of Universit´a degli Studi di Pavia in collaboration with STMicroelectronics and Huawei. The dissertation is part of broader efforts to demonstrate and design a complete 5G E-Band transmitter.

The demand for an enriched end-user experience and increased performance in next generation electronic applications is never ending, and it is a common trend for a wide spectrum of applications owing to different markets, like computing, mobile communication and automotive. For this reason wireless transceivers have become widespread components for nowadays electronics with a constant demand for power reduction and data-rate increase. Data-rates in wireless communications have been steadily increasing with on-chip processing rate and logic density both in network applications and in hard-disk interconnects. The data-rates are now exceeding 1-Gbps and are expected to grow exponentially in next years as new standards are released together with the enormous amount of unlicensed bandwidth in the E-Band spectrum (71-76 GHz and 81-86 GHz bands). The development of 5G communication systems is underway. Point-topoint wireless links in the E-Band can provide high data-rate, easily deployable, cheap and flexible Backhaul solutions, important enablers for the mobile network evolution towards 5G network. The development of CMOS/BiCMOS integrated transceivers for E-Band Backhaul applications can help reducing the cost and footprint of the equipment, but presents design challenges, mostly related to the use of adaptive spectrally-efficient high-order modulations, which mandate high linearity and low Phase-Noise. In example when employing 64- Quadrature Amplitude Modulation (64-QAM), very low Phase-Noise levels are required to limit Error Vector Magnitude (EVM) - i.e. less than -117 dBc/Hz at 1-MHz offset from f = 20 GHz carrier. In the frame of gigabit wireless systems, the work discussed in this thesis concerns with local-oscillator (LO) generation requirements for E-Band Backhaul applications spanning from the concept of the circuit to its implementation. Phase-Noise specifications for the frequency synthesizer are identified, and design and optimization of VCOs performance is proposed. A K-Band Class-C VCO is proposed as key block of the frequency synthesizer. It achieves ultra-low Phase-Noise performance, while still achieving a wide Tuning-Range (TR), essential feature in E-Band communication standards. The choice between CMOS Versus BJT devices is investigated and the impact of the intrinsic Base-Resistance (rb) in BJT-based VCOs is addressed. BJT-based VCO shows ∼2dB better Phase-Noise when compared to CMOS-based VCO and low supply is employed. When higher supply is leveraged, BJT-based VCO advantage is kept while CMOS-based VCO is not able to reach the targeted Tuning-Range due to thick oxide devices parasitics. The challenges of achieving such a low Phase-Noise are discussed in detail, with particular emphasis on the minimization of L/QT, inductor versus Quality-Factor ratio. Prototypes have been realized in a 55nm BiCMOS technology. Operated at 2.5 V supply with the largest amplitude allowed by reliability constraints, measurements show a Phase-Noise as low as -119 dBc/Hz at 1-MHz offset from a 20-GHz carrier with a Tuning-Range of 19% and Figure of Merit (FoM) of -187 dBc/Hz. Power consumption is 56 mW. This dissertation demonstrates advances over State-Of-The-Art primarily in terms of low Phase-Noise performance, and shows how the proposed circuit is suitable as local-oscillator building block in direct-conversion E-Band Backhaul transceivers. The work has been performed in the Analog Integrated Circuits Laboratory (AICLab) of Universit´a degli Studi di Pavia in collaboration with STMicroelectronics and Huawei. The dissertation is part of broader efforts to demonstrate and design a complete 5G E-Band transmitter.

Design And Optimization Of A K-Band Low-Noise Bipolar Class-C VCO For 5G Backhaul Systems in 55nm BiCMOS Technology

LACAITA, NICCOLO' RAFFAELE
2018

Abstract

The demand for an enriched end-user experience and increased performance in next generation electronic applications is never ending, and it is a common trend for a wide spectrum of applications owing to different markets, like computing, mobile communication and automotive. For this reason wireless transceivers have become widespread components for nowadays electronics with a constant demand for power reduction and data-rate increase. Data-rates in wireless communications have been steadily increasing with on-chip processing rate and logic density both in network applications and in hard-disk interconnects. The data-rates are now exceeding 1-Gbps and are expected to grow exponentially in next years as new standards are released together with the enormous amount of unlicensed bandwidth in the E-Band spectrum (71-76 GHz and 81-86 GHz bands). The development of 5G communication systems is underway. Point-topoint wireless links in the E-Band can provide high data-rate, easily deployable, cheap and flexible Backhaul solutions, important enablers for the mobile network evolution towards 5G network. The development of CMOS/BiCMOS integrated transceivers for E-Band Backhaul applications can help reducing the cost and footprint of the equipment, but presents design challenges, mostly related to the use of adaptive spectrally-efficient high-order modulations, which mandate high linearity and low Phase-Noise. In example when employing 64- Quadrature Amplitude Modulation (64-QAM), very low Phase-Noise levels are required to limit Error Vector Magnitude (EVM) - i.e. less than -117 dBc/Hz at 1-MHz offset from f = 20 GHz carrier. In the frame of gigabit wireless systems, the work discussed in this thesis concerns with local-oscillator (LO) generation requirements for E-Band Backhaul applications spanning from the concept of the circuit to its implementation. Phase-Noise specifications for the frequency synthesizer are identified, and design and optimization of VCOs performance is proposed. A K-Band Class-C VCO is proposed as key block of the frequency synthesizer. It achieves ultra-low Phase-Noise performance, while still achieving a wide Tuning-Range (TR), essential feature in E-Band communication standards. The choice between CMOS Versus BJT devices is investigated and the impact of the intrinsic Base-Resistance (rb) in BJT-based VCOs is addressed. BJT-based VCO shows ∼2dB better Phase-Noise when compared to CMOS-based VCO and low supply is employed. When higher supply is leveraged, BJT-based VCO advantage is kept while CMOS-based VCO is not able to reach the targeted Tuning-Range due to thick oxide devices parasitics. The challenges of achieving such a low Phase-Noise are discussed in detail, with particular emphasis on the minimization of L/QT, inductor versus Quality-Factor ratio. Prototypes have been realized in a 55nm BiCMOS technology. Operated at 2.5 V supply with the largest amplitude allowed by reliability constraints, measurements show a Phase-Noise as low as -119 dBc/Hz at 1-MHz offset from a 20-GHz carrier with a Tuning-Range of 19% and Figure of Merit (FoM) of -187 dBc/Hz. Power consumption is 56 mW. This dissertation demonstrates advances over State-Of-The-Art primarily in terms of low Phase-Noise performance, and shows how the proposed circuit is suitable as local-oscillator building block in direct-conversion E-Band Backhaul transceivers. The work has been performed in the Analog Integrated Circuits Laboratory (AICLab) of Universit´a degli Studi di Pavia in collaboration with STMicroelectronics and Huawei. The dissertation is part of broader efforts to demonstrate and design a complete 5G E-Band transmitter.
The demand for an enriched end-user experience and increased performance in next generation electronic applications is never ending, and it is a common trend for a wide spectrum of applications owing to different markets, like computing, mobile communication and automotive. For this reason wireless transceivers have become widespread components for nowadays electronics with a constant demand for power reduction and data-rate increase. Data-rates in wireless communications have been steadily increasing with on-chip processing rate and logic density both in network applications and in hard-disk interconnects. The data-rates are now exceeding 1-Gbps and are expected to grow exponentially in next years as new standards are released together with the enormous amount of unlicensed bandwidth in the E-Band spectrum (71-76 GHz and 81-86 GHz bands). The development of 5G communication systems is underway. Point-topoint wireless links in the E-Band can provide high data-rate, easily deployable, cheap and flexible Backhaul solutions, important enablers for the mobile network evolution towards 5G network. The development of CMOS/BiCMOS integrated transceivers for E-Band Backhaul applications can help reducing the cost and footprint of the equipment, but presents design challenges, mostly related to the use of adaptive spectrally-efficient high-order modulations, which mandate high linearity and low Phase-Noise. In example when employing 64- Quadrature Amplitude Modulation (64-QAM), very low Phase-Noise levels are required to limit Error Vector Magnitude (EVM) - i.e. less than -117 dBc/Hz at 1-MHz offset from f = 20 GHz carrier. In the frame of gigabit wireless systems, the work discussed in this thesis concerns with local-oscillator (LO) generation requirements for E-Band Backhaul applications spanning from the concept of the circuit to its implementation. Phase-Noise specifications for the frequency synthesizer are identified, and design and optimization of VCOs performance is proposed. A K-Band Class-C VCO is proposed as key block of the frequency synthesizer. It achieves ultra-low Phase-Noise performance, while still achieving a wide Tuning-Range (TR), essential feature in E-Band communication standards. The choice between CMOS Versus BJT devices is investigated and the impact of the intrinsic Base-Resistance (rb) in BJT-based VCOs is addressed. BJT-based VCO shows ∼2dB better Phase-Noise when compared to CMOS-based VCO and low supply is employed. When higher supply is leveraged, BJT-based VCO advantage is kept while CMOS-based VCO is not able to reach the targeted Tuning-Range due to thick oxide devices parasitics. The challenges of achieving such a low Phase-Noise are discussed in detail, with particular emphasis on the minimization of L/QT, inductor versus Quality-Factor ratio. Prototypes have been realized in a 55nm BiCMOS technology. Operated at 2.5 V supply with the largest amplitude allowed by reliability constraints, measurements show a Phase-Noise as low as -119 dBc/Hz at 1-MHz offset from a 20-GHz carrier with a Tuning-Range of 19% and Figure of Merit (FoM) of -187 dBc/Hz. Power consumption is 56 mW. This dissertation demonstrates advances over State-Of-The-Art primarily in terms of low Phase-Noise performance, and shows how the proposed circuit is suitable as local-oscillator building block in direct-conversion E-Band Backhaul transceivers. The work has been performed in the Analog Integrated Circuits Laboratory (AICLab) of Universit´a degli Studi di Pavia in collaboration with STMicroelectronics and Huawei. The dissertation is part of broader efforts to demonstrate and design a complete 5G E-Band transmitter.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11571/1214839
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