Ultra-Low Phase Noise DCO Design for Automotive Radar Applications Using Advanced CMOS Technologies

In applications where precise frequency synthesis is crucial, such as generating carrier signals for transmission systems, the issue of phase noise takes center stage in defining system performance. The demand for low phase noise frequency synthesizers has significantly increased, especially with the growing need for higher data rates in modern communication systems. Another critical domain where phase noise plays a pivotal role is in radar systems. Radar systems utilize the Doppler effect to extract essential information about target distance and speed by comparing the frequencies of transmitted and received signals. While radar systems are renowned for their precision, their inherent complexity often results in high costs. Traditionally, they have found extensive use in aviation, particularly for detecting disturbances. However, in recent years, radar systems have made their way into the automotive sector, specifically in advanced driving assistance systems (ADAS). In a digitally controlled oscillator (DCO)-based frequency synthesizer DCO itself, is one of the most critical building blocks in an integrated mm-wave radar transceiver. In truth, when designing a DCO, stringent tradeoffs between various performance parameters must be considered, such as the phase noise (PN), frequency tuning range (TR), start-up robustness, power consumption, and area. The design of DCOs that are capable of simultaneously achieving low PN and a wide TR is a very challenging task, especially at mm-wave frequencies. This thesis focuses on oscillators, which are the fundamental building blocks of frequency synthesizers in ultra-scaled CMOS technology, addressing this challenge. The primary challenge now is to achieve performance levels comparable to those attainable with bipolar technology. After providing a brief overview of the fundamental operating principles of a typical radar, we proceed to outline a methodology for identifying the optimal oscillation frequency in analog circuit design. This critical frequency, essential for achieving peak performance, is systematically determined to ensure optimal circuit operation. The subsequent section details the design of a 20GHz quad-core oscillator, leveraging the advantages of a class B oscillator with tail coupling at the second harmonic through transformers. This strategic design effectively mitigates flicker noise from active devices, addressing a significant limitation in modern CMOS technologies. Finally, we present measured results following a fourfold multiplication, demonstrating the oscillator's suitability for automotive radar applications in compliance with regulatory requirements.