This paper presents a low-power, high-performance continuous-time SD modulator for MEMS microphones front-end. The ΣΔ modulator 3rd-order loop filter has been implemented with a low-noise, power-optimized active-RC architecture that uses only two operational amplifiers. This solution, along with the use of a 15-level quantizer and of a feedback DAC with three-level current-steering elements, which minimizes the noise contribution for small input signals, allows achieving a DR larger than 100 dB, while consuming less than 0.5 mW, as required in always-running audio modules for portable devices. The proposed ΣΔ modulator, realized in 0.16-µm CMOS technology with an area of 0.21 mm^2, achieves 106-dB A-weighted DR and 91.3-dB peak SNDR, consuming 390 µW from a 1.6-V power supply.

A 106-dB A-Weighted DR Low-Power Continuous-Time ΣΔ Modulator for MEMS Microphones

DE BERTI, CLAUDIO;MALCOVATI, PIERO;
2016-01-01

Abstract

This paper presents a low-power, high-performance continuous-time SD modulator for MEMS microphones front-end. The ΣΔ modulator 3rd-order loop filter has been implemented with a low-noise, power-optimized active-RC architecture that uses only two operational amplifiers. This solution, along with the use of a 15-level quantizer and of a feedback DAC with three-level current-steering elements, which minimizes the noise contribution for small input signals, allows achieving a DR larger than 100 dB, while consuming less than 0.5 mW, as required in always-running audio modules for portable devices. The proposed ΣΔ modulator, realized in 0.16-µm CMOS technology with an area of 0.21 mm^2, achieves 106-dB A-weighted DR and 91.3-dB peak SNDR, consuming 390 µW from a 1.6-V power supply.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11571/1123602
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