Modern communication systems are characterized by the need for increased data-rate. This is typically achieved through a larger channel bandwidth, following the same trend already observed in the past. The number of bands and the number of antennas (MIMO) is expected to grow, as well. In this scenario, it becomes highly desirable to minimize the number of external RF filters in a transceiver, with the goal of limiting area occupation and cost of the system. From the Receiver (RX) side, this imposes strong linearity requirements, posing important design challenges in the base-band (BB) portion of the RX. In typical RX architectures, the first element after passive-mixer is a TIA or a high-order filter, which must be able to handle strong Out-of-Band blockers, without degrading SNR. Two different approaches in the TIA design are proposed here. The first one is based on the more "classical'' OTA closed in shunt-feedback. Instead of adopting conventional Miller compensation the proposed OTA exploits additional zero's created in both OTA and feedback path to achieve stability, with increased GLoop unity gain bandwidth (GBW = 1.5GHz). This has positive impact on IIP3, as demonstrated through an intuitive but quantitative linearity analysis. Following this approach, a Stand-Alone 20-MHz-BW TIA is designed, achieving +50.5dBm OOB IIP3 and +21 uVRMS in-band noise with 5.4mW consumption. The second proposed TIA is based on Regulated-Cascode architecture, allowing to achieve a TIA bandwidth in the order of 100MHz, which is compatible with the expected Sub-6GHz 5G channel BW. The basic Regulated-Cascode architecture is modified adding a positive capacitive feedback, with benefits for selectivity. This capacitance improves the Q of the CC poles and produces one additional pole, allowing to implement a 130MHz BW 3rd order Butterworth current filter. The filter is integrated in a Mixer-First Receiver achieving 5.5dB NF, with +21dBm IIP3 at Df/f=3, and blocker P1dB of +3dBm at Df/f = 6. In comparison with State-of-the-Art around 15x larger bandwidth is achieved with 2-3x smaller power consumption and comparable noise and linearity.

Modern communication systems are characterized by the need for increased data-rate. This is typically achieved through a larger channel bandwidth, following the same trend already observed in the past. The number of bands and the number of antennas (MIMO) is expected to grow, as well. In this scenario, it becomes highly desirable to minimize the number of external RF filters in a transceiver, with the goal of limiting area occupation and cost of the system. From the Receiver (RX) side, this imposes strong linearity requirements, posing important design challenges in the base-band (BB) portion of the RX. In typical RX architectures, the first element after passive-mixer is a TIA or a high-order filter, which must be able to handle strong Out-of-Band blockers, without degrading SNR. Two different approaches in the TIA design are proposed here. The first one is based on the more "classical'' OTA closed in shunt-feedback. Instead of adopting conventional Miller compensation the proposed OTA exploits additional zero's created in both OTA and feedback path to achieve stability, with increased GLoop unity gain bandwidth (GBW = 1.5GHz). This has positive impact on IIP3, as demonstrated through an intuitive but quantitative linearity analysis. Following this approach, a Stand-Alone 20-MHz-BW TIA is designed, achieving +50.5dBm OOB IIP3 and +21 uVRMS in-band noise with 5.4mW consumption. The second proposed TIA is based on Regulated-Cascode architecture, allowing to achieve a TIA bandwidth in the order of 100MHz, which is compatible with the expected Sub-6GHz 5G channel BW. The basic Regulated-Cascode architecture is modified adding a positive capacitive feedback, with benefits for selectivity. This capacitance improves the Q of the CC poles and produces one additional pole, allowing to implement a 130MHz BW 3rd order Butterworth current filter. The filter is integrated in a Mixer-First Receiver achieving 5.5dB NF, with +21dBm IIP3 at Df/f=3, and blocker P1dB of +3dBm at Df/f = 6. In comparison with State-of-the-Art around 15x larger bandwidth is achieved with 2-3x smaller power consumption and comparable noise and linearity.

Analysis and Design of Highly Linear Base-Band Filters for SAW-Less FDD Receivers

PINI, GIACOMO
2019-02-14

Abstract

Modern communication systems are characterized by the need for increased data-rate. This is typically achieved through a larger channel bandwidth, following the same trend already observed in the past. The number of bands and the number of antennas (MIMO) is expected to grow, as well. In this scenario, it becomes highly desirable to minimize the number of external RF filters in a transceiver, with the goal of limiting area occupation and cost of the system. From the Receiver (RX) side, this imposes strong linearity requirements, posing important design challenges in the base-band (BB) portion of the RX. In typical RX architectures, the first element after passive-mixer is a TIA or a high-order filter, which must be able to handle strong Out-of-Band blockers, without degrading SNR. Two different approaches in the TIA design are proposed here. The first one is based on the more "classical'' OTA closed in shunt-feedback. Instead of adopting conventional Miller compensation the proposed OTA exploits additional zero's created in both OTA and feedback path to achieve stability, with increased GLoop unity gain bandwidth (GBW = 1.5GHz). This has positive impact on IIP3, as demonstrated through an intuitive but quantitative linearity analysis. Following this approach, a Stand-Alone 20-MHz-BW TIA is designed, achieving +50.5dBm OOB IIP3 and +21 uVRMS in-band noise with 5.4mW consumption. The second proposed TIA is based on Regulated-Cascode architecture, allowing to achieve a TIA bandwidth in the order of 100MHz, which is compatible with the expected Sub-6GHz 5G channel BW. The basic Regulated-Cascode architecture is modified adding a positive capacitive feedback, with benefits for selectivity. This capacitance improves the Q of the CC poles and produces one additional pole, allowing to implement a 130MHz BW 3rd order Butterworth current filter. The filter is integrated in a Mixer-First Receiver achieving 5.5dB NF, with +21dBm IIP3 at Df/f=3, and blocker P1dB of +3dBm at Df/f = 6. In comparison with State-of-the-Art around 15x larger bandwidth is achieved with 2-3x smaller power consumption and comparable noise and linearity.
14-feb-2019
Modern communication systems are characterized by the need for increased data-rate. This is typically achieved through a larger channel bandwidth, following the same trend already observed in the past. The number of bands and the number of antennas (MIMO) is expected to grow, as well. In this scenario, it becomes highly desirable to minimize the number of external RF filters in a transceiver, with the goal of limiting area occupation and cost of the system. From the Receiver (RX) side, this imposes strong linearity requirements, posing important design challenges in the base-band (BB) portion of the RX. In typical RX architectures, the first element after passive-mixer is a TIA or a high-order filter, which must be able to handle strong Out-of-Band blockers, without degrading SNR. Two different approaches in the TIA design are proposed here. The first one is based on the more "classical'' OTA closed in shunt-feedback. Instead of adopting conventional Miller compensation the proposed OTA exploits additional zero's created in both OTA and feedback path to achieve stability, with increased GLoop unity gain bandwidth (GBW = 1.5GHz). This has positive impact on IIP3, as demonstrated through an intuitive but quantitative linearity analysis. Following this approach, a Stand-Alone 20-MHz-BW TIA is designed, achieving +50.5dBm OOB IIP3 and +21 uVRMS in-band noise with 5.4mW consumption. The second proposed TIA is based on Regulated-Cascode architecture, allowing to achieve a TIA bandwidth in the order of 100MHz, which is compatible with the expected Sub-6GHz 5G channel BW. The basic Regulated-Cascode architecture is modified adding a positive capacitive feedback, with benefits for selectivity. This capacitance improves the Q of the CC poles and produces one additional pole, allowing to implement a 130MHz BW 3rd order Butterworth current filter. The filter is integrated in a Mixer-First Receiver achieving 5.5dB NF, with +21dBm IIP3 at Df/f=3, and blocker P1dB of +3dBm at Df/f = 6. In comparison with State-of-the-Art around 15x larger bandwidth is achieved with 2-3x smaller power consumption and comparable noise and linearity.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11571/1243912
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