This letter shows a fully differential linear transimpedance amplifier designed for the emerging coherent optical communications for high data rate transmissions. The purpose of this letter is to present a possible solution in 28-nm CMOS technology instead of the most frequently used BiCMOS. The idea is to take advantage of the linearity of CMOS to partially offset its inherently lower transconductance over current ratio, which typically limits the bandwidth. The proposed TIA presents a -3-dB bandwidth equal to 42 GHz and its transimpedance gain can be programmable from 78 to 36 dB Omega with four variable gain stages. At maximum gain, the measured average input noise is equal to 18 pA/√Hz whereas the maximum total harmonic distortion for an output voltage swing of 500-mV peak-to-peak differential is always lower than 1.8% over the entire gain range. The complete transimpedance amplifier including the bias and dc offset cancellation circuits consumes 319 mW from a 2.4-V supply voltage.

A 42-GHz TIA in 28-nm CMOS with Less Than 1.8% THD for Optical Coherent Receivers

Aschei L.;Cordioli N.;Rossi P.;Montanari D.;Castello R.;Manstretta D.
2020

Abstract

This letter shows a fully differential linear transimpedance amplifier designed for the emerging coherent optical communications for high data rate transmissions. The purpose of this letter is to present a possible solution in 28-nm CMOS technology instead of the most frequently used BiCMOS. The idea is to take advantage of the linearity of CMOS to partially offset its inherently lower transconductance over current ratio, which typically limits the bandwidth. The proposed TIA presents a -3-dB bandwidth equal to 42 GHz and its transimpedance gain can be programmable from 78 to 36 dB Omega with four variable gain stages. At maximum gain, the measured average input noise is equal to 18 pA/√Hz whereas the maximum total harmonic distortion for an output voltage swing of 500-mV peak-to-peak differential is always lower than 1.8% over the entire gain range. The complete transimpedance amplifier including the bias and dc offset cancellation circuits consumes 319 mW from a 2.4-V supply voltage.
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Utilizza questo identificativo per citare o creare un link a questo documento: http://hdl.handle.net/11571/1350815
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