This article presents a hybrid single-inductor bipolar-output (SIBO) dc-dc converter for active-matrix organic light-emitting diode (AMOLED) displays, which are relatively more sensitive to the supply noise on the positive supply. First, to improve the display quality we adopt a floating negative output configuration to migrate all the switching ripples into the negative output, achieving a near-zero voltage ripple on the positive output. Second, we design low-power shunt regulators, which only deal with a small portion of the output ripple, to regulate the positive output voltage further, improving the load transient response. Besides, the hybrid topology and the proposed cross-coupled bootstrap-based level-shifter, with a dual-PMOS inverter buffer, only uses standard CMOS devices without deep-n-well, reducing the chip area and cost. The proposed converter, implemented in 0.35-μm CMOS with 5-V devices, operates at 1 MHz, leading to a measured positive output voltage ripple lower than 1 mV (all conditions). It achieves a measured 3-mV undershoot voltage and, an unnoticeable overshoot voltage on the positive output, when the output current varies between 30 and 350 mA. The measured peak power efficiency is 89.3% at 1.1-W output power. The maximum output power is 3.5 W.
A Hybrid Single-Inductor Bipolar-Output DC-DC Converter With Floating Negative Output for AMOLED Displays
Bonizzoni E.;Boera F.;
2021-01-01
Abstract
This article presents a hybrid single-inductor bipolar-output (SIBO) dc-dc converter for active-matrix organic light-emitting diode (AMOLED) displays, which are relatively more sensitive to the supply noise on the positive supply. First, to improve the display quality we adopt a floating negative output configuration to migrate all the switching ripples into the negative output, achieving a near-zero voltage ripple on the positive output. Second, we design low-power shunt regulators, which only deal with a small portion of the output ripple, to regulate the positive output voltage further, improving the load transient response. Besides, the hybrid topology and the proposed cross-coupled bootstrap-based level-shifter, with a dual-PMOS inverter buffer, only uses standard CMOS devices without deep-n-well, reducing the chip area and cost. The proposed converter, implemented in 0.35-μm CMOS with 5-V devices, operates at 1 MHz, leading to a measured positive output voltage ripple lower than 1 mV (all conditions). It achieves a measured 3-mV undershoot voltage and, an unnoticeable overshoot voltage on the positive output, when the output current varies between 30 and 350 mA. The measured peak power efficiency is 89.3% at 1.1-W output power. The maximum output power is 3.5 W.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
