This work is concerned with the design and the characterization of front-end channels, developed in a 28 nm CMOS technology, conceived for the readout of pixel sensors in future, high-rate applications at the next generation facilities. Two front-end architectures are discussed. In the first one, an in-pixel flash ADC is exploited for the digitization of the signal, whereas the second one features a Time-over-Threshold (ToT) approach. A prototype including the ADC-based front-end has been submitted and the characterization of the chip is discussed in the paper. Simulation results relevant to the ToT-based architecture are reported.

28 nm front-end channels for the readout of pixel sensors in future high-rate applications

Ratti L.;
2024-01-01

Abstract

This work is concerned with the design and the characterization of front-end channels, developed in a 28 nm CMOS technology, conceived for the readout of pixel sensors in future, high-rate applications at the next generation facilities. Two front-end architectures are discussed. In the first one, an in-pixel flash ADC is exploited for the digitization of the signal, whereas the second one features a Time-over-Threshold (ToT) approach. A prototype including the ADC-based front-end has been submitted and the characterization of the chip is discussed in the paper. Simulation results relevant to the ToT-based architecture are reported.
2024
Electrical & Electronics Engineering
Esperti anonimi
Inglese
Internazionale
ELETTRONICO
19
4
Analogue electronic circuits; Electronic detector readout concepts (solid-state); Front-end electronics for detector readout
no
5
info:eu-repo/semantics/article
262
Gaioni, L.; Galliani, A.; Ratti, L.; Re, V.; Traversi, G.
1 Contributo su Rivista::1.1 Articolo in rivista
none
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11571/1496276
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