This work is concerned with the design, in a 28 nm CMOS technology, of an analog front-end processor for the readout of pixel detectors in future high energy physics experiments. The front-end circuit being developed consists of a shaper-less architecture which leverages the Time-Over-Threshold (ToT) technique for the analog-to-digital conversion of the signal from the detector. Post-layout simulation results show that the circuit, operated with a nominal current close to 4 uA and a supply voltage of 0.9 V, is able to operate at a threshold below 1000 electrons.
A Time-over-Threshold based analog front-end in 28 nm CMOS for pixel detectors in future colliders
Ratti L.;
2024-01-01
Abstract
This work is concerned with the design, in a 28 nm CMOS technology, of an analog front-end processor for the readout of pixel detectors in future high energy physics experiments. The front-end circuit being developed consists of a shaper-less architecture which leverages the Time-Over-Threshold (ToT) technique for the analog-to-digital conversion of the signal from the detector. Post-layout simulation results show that the circuit, operated with a nominal current close to 4 uA and a supply voltage of 0.9 V, is able to operate at a threshold below 1000 electrons.File in questo prodotto:
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