An all-digital frequency synthesizer for cellular transmitter is presented. Low phase-noise is achieved both in-band and out-of-band exploiting a 2-dimensional Vernier time-to-digital converter and a dither-less digitally controlled oscillator. These building blocks heavily rely on digital calibration techniques to precisely and efficiently implement two-point modulation and spur cancellation in the presence of implementation impairments. The presented prototype shows an in-band phase noise of 108 dBc/Hz, an out-of-band phase noise of 160 dBc/Hz @20 MHz and in-band fractional spurs below 50 dBc. These results are obtained for an output carrier of 1.8 GHz, a reference clock of 26 MHz, with a power consumption of 41.6 mW.

"A Dither-Less All Digital PLL for Cellular Transmitters,"

VERCESI, LUCA;LISCIDINI, ANTONIO;CASTELLO, RINALDO
2012

Abstract

An all-digital frequency synthesizer for cellular transmitter is presented. Low phase-noise is achieved both in-band and out-of-band exploiting a 2-dimensional Vernier time-to-digital converter and a dither-less digitally controlled oscillator. These building blocks heavily rely on digital calibration techniques to precisely and efficiently implement two-point modulation and spur cancellation in the presence of implementation impairments. The presented prototype shows an in-band phase noise of 108 dBc/Hz, an out-of-band phase noise of 160 dBc/Hz @20 MHz and in-band fractional spurs below 50 dBc. These results are obtained for an output carrier of 1.8 GHz, a reference clock of 26 MHz, with a power consumption of 41.6 mW.
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Utilizza questo identificativo per citare o creare un link a questo documento: http://hdl.handle.net/11571/450750
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