The analog front end of an echo cancellation burst mode (ECBM) transceiver operating from a single 5-V supply is described. The chip performs pulse shaping and line driving in the transmit section and hybrid function, equalization, A/D and D/A conversion, automatic gain control, threshold detection for a phase-locked loop (PLL), and wake-up in the receive section. The partitioning between analog and digital functions is explained. The analog portion of the chip is described for both the receive and transmit portions, and design considerations for the various building blocks are outlined. The chip contains 45 amplifiers of seven different types and three different types of comparators and dissipates about 160 mW in the normal operation mode and 5 mW in the power-down mode. The die area is 50000 mil2 in a 2-μm, double-poly, single-metal CMOS technology
Analog front end of an ECBM transceiver for ISDN
CASTELLO, RINALDO;
1990-01-01
Abstract
The analog front end of an echo cancellation burst mode (ECBM) transceiver operating from a single 5-V supply is described. The chip performs pulse shaping and line driving in the transmit section and hybrid function, equalization, A/D and D/A conversion, automatic gain control, threshold detection for a phase-locked loop (PLL), and wake-up in the receive section. The partitioning between analog and digital functions is explained. The analog portion of the chip is described for both the receive and transmit portions, and design considerations for the various building blocks are outlined. The chip contains 45 amplifiers of seven different types and three different types of comparators and dissipates about 160 mW in the normal operation mode and 5 mW in the power-down mode. The die area is 50000 mil2 in a 2-μm, double-poly, single-metal CMOS technologyI documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
