In this paper an FPGA based coprocessor is presented, interfaced with the CPU to the computer through the PCI bus; it allows a faster evaluation of the energy of a crystal, which is usually the heaviest part of a Monte Carlo simulation. The work is part of a global project aimed to design and build a parallel system made up by a cluster of accelerated workstations communicating through one among the most advanced modern network technologies. First estimations of performance show a big acceleration with respect the execution of the same application on an Intel CPU based mother-board.
A Parallel Neurochip for Neural Networks Implementing the Reactive Tabu Search Algorithm: Application Case Studies
DANESE, GIOVANNI;DE LOTTO, IVO;LEPORATI, FRANCESCO;RAMAT, STEFANO;
2001-01-01
Abstract
In this paper an FPGA based coprocessor is presented, interfaced with the CPU to the computer through the PCI bus; it allows a faster evaluation of the energy of a crystal, which is usually the heaviest part of a Monte Carlo simulation. The work is part of a global project aimed to design and build a parallel system made up by a cluster of accelerated workstations communicating through one among the most advanced modern network technologies. First estimations of performance show a big acceleration with respect the execution of the same application on an Intel CPU based mother-board.File in questo prodotto:
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