In the design of a single chip for wireless-sensor-network and WPAN applications (e.g., IEEE 802.15.4), the receiver sensitivity is generally sacrificed in favor of a vanishing power consumption and a low-cost solution. There is a trade off between these two requirements, as the use of resonant loads offers high power efficiency while an inductor-free approach saves die area resulting in a cheaper design. Since an LC-oscillator topology is mandatory to achieve a minimal current draw, the reduction of the number of coils has to be done in the LNA, the mixer and the quadrature generator. In this work, starting from the LNA-Mixer and VCO (LMV) cell topology, a single-coil low-power receiver shares the bias current among all the RF blocks of the analog front-end. The receiver prototype chip consumes 3.6mW and has an active die area of 0.35mm2. It is based on a low-IF architecture and includes a baseband variable-gain complex filter for channel selection.
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