This paper presents a novel frequency tripler circuit topology which yields a remarkable improvement on the suppression of the driving signal frequency at the output,compared to conventional designs exploiting transistors in class-C. The active core of the circuit approximates the transfer characteristic of a third-order polynomial that ideally produces only a third-harmonic of the input signal. Implemented in a 55nm SiGe-BiCMOS technology and consuming 13.6mA from 1.7V,the tripler demonstrates ~40dB suppression of the input signal and its 5th harmonic over 16% factional bandwidth and robustness to power variation of the driving signal over a 15dB range.
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Titolo: | 40GHz Frequency Tripler with High Fundamental and Harmonics Rejection in 55nm SiGe-BiCMOS |
Autori: | |
Data di pubblicazione: | 2019 |
Abstract: | This paper presents a novel frequency tripler circuit topology which yields a remarkable improvement on the suppression of the driving signal frequency at the output,compared to conventional designs exploiting transistors in class-C. The active core of the circuit approximates the transfer characteristic of a third-order polynomial that ideally produces only a third-harmonic of the input signal. Implemented in a 55nm SiGe-BiCMOS technology and consuming 13.6mA from 1.7V,the tripler demonstrates ~40dB suppression of the input signal and its 5th harmonic over 16% factional bandwidth and robustness to power variation of the driving signal over a 15dB range. |
Handle: | http://hdl.handle.net/11571/1363875 |
ISBN: | 978-1-7281-1550-4 |
Appare nelle tipologie: | 4.1 Contributo in Atti di convegno |