This paper deals with the gain scheduling feature for zero-phase-shift direct repetitive control (dRC) implemented in a FPGA system. Proposed control structure is intended to be used in ultra-low THD, fast transient response stand-alone generating applications. Moreover, implementation aspects of the dRC and gain scheduling algorithm are highlighted with reference to an industrial-grade μProcessor-FPGA control system and its graphical programming capabilities. © 2016 IEEE.
Direct repetitive control with gain scheduling feature for stand-alone generating applications
Zanchetta P.
2016-01-01
Abstract
This paper deals with the gain scheduling feature for zero-phase-shift direct repetitive control (dRC) implemented in a FPGA system. Proposed control structure is intended to be used in ultra-low THD, fast transient response stand-alone generating applications. Moreover, implementation aspects of the dRC and gain scheduling algorithm are highlighted with reference to an industrial-grade μProcessor-FPGA control system and its graphical programming capabilities. © 2016 IEEE.File in questo prodotto:
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