Pipelined inner product function generator

A method for synthesis of pipelined innerproduct function is presented. A merged architecture is at the base of our method. An algorithm for the optimal pipelines insertion in partial product reduction tree is described. Our technique allows designers to obtain fast design of inner product function at a reference frequency. Lower area and lower power are further results achieved by automatic pipelines insertion. Our technique has been implemented by a program that furnishes an optimized netlist. The performance of the latter has been compared to the result obtained by cell-based synthesis software in the design of a pipelined FIR filter for hard disk drive equalization.