This paper describes the development of the hardware and software support for a FPGA based accelerator initially conceived for Montecarlo Metropolis simulations and then evolved to an application specific processor for accelerating floating point calculations. The accelerator is implemented onto an Altera commercial board lodging last generation Stratix family components; its simulation already showed that it is able to outperform modern processing systems in executing floating point operations. In particular the interface block, for communicating with a PC host computer and the memory handler, needed for a quick access to elaboration data, without a time consuming communication are widely described.
Hardware and software support for the implementation of dipolar system simulations onto an accelerator
BERA, MARCO;DANESE, GIOVANNI;DE LOTTO, IVO;LEPORATI, FRANCESCO;SPELGATTI, ALVARO
2004-01-01
Abstract
This paper describes the development of the hardware and software support for a FPGA based accelerator initially conceived for Montecarlo Metropolis simulations and then evolved to an application specific processor for accelerating floating point calculations. The accelerator is implemented onto an Altera commercial board lodging last generation Stratix family components; its simulation already showed that it is able to outperform modern processing systems in executing floating point operations. In particular the interface block, for communicating with a PC host computer and the memory handler, needed for a quick access to elaboration data, without a time consuming communication are widely described.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.