The ever-growing mobile data traffic is driving continuous innovation in wireless communication and future mobile networks are expected to provide ultra-high data rates. However, the use of spectrally efficient high-order modulations sets challenging phase-noise specifications, particularly in the network infrastructure. In this paper, multi-core diode-coupled LC voltage-controlled oscillators in BiCMOS technology are proposed to meet the challenge of achieving ultra-low phase noise in a scalable and power-efficient way. Compared to resistive switches (realized with MOS transistors), diodes are compatible with the larger voltage swing of low-noise bipolar oscillators and the coupling strength can be adjusted with the diode bias current. A theoretical model investigates design trade-off and the effect of resonance frequencies mismatches among the different oscillators. A quad-core 20GHz oscillator is finally simulated, showing a phase noise as low as -125dBc/Hz at 1MHz from the carrier with a tuning range of 18% and 240mW power consumption. According to noise requirements, two or three auxiliary cores can be turned off raising phase noise by 3dB or 6dB but reducing the power consumption to 120mW or 57mW respectively.
Diode-coupled noise-scalable multi-core BiCMOS VCOs
Riccardi D.;Mazzanti A.
2020-01-01
Abstract
The ever-growing mobile data traffic is driving continuous innovation in wireless communication and future mobile networks are expected to provide ultra-high data rates. However, the use of spectrally efficient high-order modulations sets challenging phase-noise specifications, particularly in the network infrastructure. In this paper, multi-core diode-coupled LC voltage-controlled oscillators in BiCMOS technology are proposed to meet the challenge of achieving ultra-low phase noise in a scalable and power-efficient way. Compared to resistive switches (realized with MOS transistors), diodes are compatible with the larger voltage swing of low-noise bipolar oscillators and the coupling strength can be adjusted with the diode bias current. A theoretical model investigates design trade-off and the effect of resonance frequencies mismatches among the different oscillators. A quad-core 20GHz oscillator is finally simulated, showing a phase noise as low as -125dBc/Hz at 1MHz from the carrier with a tuning range of 18% and 240mW power consumption. According to noise requirements, two or three auxiliary cores can be turned off raising phase noise by 3dB or 6dB but reducing the power consumption to 120mW or 57mW respectively.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
