Two mechanisms are responsible for second order intermodulation in CMOS down-converters: RF self-mixing and device non-linearity and mismatches. An intuitive model and analytical expressions are provided for both of them. A down-converter prototype, drawing 3.2 mA from a 1.8 V supply, part of a fully integrated 0.18 μm CMOS UMTS receiver front-end shows 66 dBm IIP2 and 16 dBm IIP3.

Analysis and optimization of IIP2 in CMOS direct down-converters

MANSTRETTA, DANILO;SVELTO, FRANCESCO
2002

Abstract

Two mechanisms are responsible for second order intermodulation in CMOS down-converters: RF self-mixing and device non-linearity and mismatches. An intuitive model and analytical expressions are provided for both of them. A down-converter prototype, drawing 3.2 mA from a 1.8 V supply, part of a fully integrated 0.18 μm CMOS UMTS receiver front-end shows 66 dBm IIP2 and 16 dBm IIP3.
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Utilizza questo identificativo per citare o creare un link a questo documento: http://hdl.handle.net/11571/14390
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