Frequency multipliers are key components for signal generation above 100 GHz. Push-push frequency doublers are popular but suffer from low conversion gain and limited fundamental rejection. Mixers with quadrature inputs offer higher gain and better fundamental suppression but need a bandwidth-limiting 90° phase shifter. This work leverages Gilbert-cells mixers driven by in-phase signals but operated at a reduced duty-cycle (δ), allowing to retain the superior conversion gain and fundamental rejection without the 90° phase shifter. A simple low-frequency loop controls δ and gives maximum conversion gain by suppressing the output DC component. The signal driving the mixer switching-quad is generated and routed by a transmission-line network which compensates for the undesirable phase shift introduced by transistors parasitics, critical in the sub-THz band. Realized in SiGe BiCMOS, the circuit proves Pout = 6.5 dBm at 148 GHz with 7.4% power efficiency and 8 dB conversion gain. With -3 dB bandwidth of 125-170 GHz, Pout > 0 dBm from 110 to 170 GHz and a fundamental rejection always above 40 dB, the frequency doubler compares favorably against previous works.

110-170 GHz 25% Duty-cycle Gilbert-cell Frequency Doubler with 6.5 dBm Peak Output Power in BiCMOS 55 nm Technology

Piotto L.;Mazzanti A.
2024-01-01

Abstract

Frequency multipliers are key components for signal generation above 100 GHz. Push-push frequency doublers are popular but suffer from low conversion gain and limited fundamental rejection. Mixers with quadrature inputs offer higher gain and better fundamental suppression but need a bandwidth-limiting 90° phase shifter. This work leverages Gilbert-cells mixers driven by in-phase signals but operated at a reduced duty-cycle (δ), allowing to retain the superior conversion gain and fundamental rejection without the 90° phase shifter. A simple low-frequency loop controls δ and gives maximum conversion gain by suppressing the output DC component. The signal driving the mixer switching-quad is generated and routed by a transmission-line network which compensates for the undesirable phase shift introduced by transistors parasitics, critical in the sub-THz band. Realized in SiGe BiCMOS, the circuit proves Pout = 6.5 dBm at 148 GHz with 7.4% power efficiency and 8 dB conversion gain. With -3 dB bandwidth of 125-170 GHz, Pout > 0 dBm from 110 to 170 GHz and a fundamental rejection always above 40 dB, the frequency doubler compares favorably against previous works.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11571/1507820
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