Cardiovascular Diseases (CVDs) stand as the leading cause of mortality worldwide. Detecting subtle heart sounds alterations in the early stages of CVDs can be crucial for an initial effective treatment. Accordingly, the analysis of Phonocardiograms (PCGs) through segmentation could be helpful for CVDs screening. A well-established algorithm for this task is based on a Convolutional Neural Network (CNN) with an encoding-decoding topology. Prior to the CNN processing., a computationally intensive input pre-processing., based on envelopes extraction, is needed. Thus., achieving real-time performance can be challenging. The main goal of this study is the hardware design., implementation, and evaluation of four PCG pre-processing circuits to be employed together in the design of a low-power point-of-care device for real-time Artificial Intelligence (AI)-based PCG segmentation. Results have shown that the approximations introduced by the fixed-point format and this innovative architecture have a negligible impact on the AI segmentation quality. Finally, the pre-processing chain is real-time compliant., achieving a maximum latency of 257 ms for an available processing window of 1.28 s., while dissipating only 61 mW of power.

FPGA Design of Digital Circuits for Phonocardiogram Pre-Processing Enabling Real-Time and Low-Power AI Processing

Ragusa D.;Gazzoni M.;Torti E.;Marenzi E.;Leporati F.
2024-01-01

Abstract

Cardiovascular Diseases (CVDs) stand as the leading cause of mortality worldwide. Detecting subtle heart sounds alterations in the early stages of CVDs can be crucial for an initial effective treatment. Accordingly, the analysis of Phonocardiograms (PCGs) through segmentation could be helpful for CVDs screening. A well-established algorithm for this task is based on a Convolutional Neural Network (CNN) with an encoding-decoding topology. Prior to the CNN processing., a computationally intensive input pre-processing., based on envelopes extraction, is needed. Thus., achieving real-time performance can be challenging. The main goal of this study is the hardware design., implementation, and evaluation of four PCG pre-processing circuits to be employed together in the design of a low-power point-of-care device for real-time Artificial Intelligence (AI)-based PCG segmentation. Results have shown that the approximations introduced by the fixed-point format and this innovative architecture have a negligible impact on the AI segmentation quality. Finally, the pre-processing chain is real-time compliant., achieving a maximum latency of 257 ms for an available processing window of 1.28 s., while dissipating only 61 mW of power.
2024
Proceedings - 2024 27th Euromicro Conference on Digital System Design, DSD 2024
Tomasz Kryjak and Frederic Petrot
Computer Science & Engineering
Esperti anonimi
Inglese
27th Euromicro Conference on Digital System Design, DSD 2024
2024
Paris (France)
Internazionale
ELETTRONICO
2024
588
595
8
979-8-3503-8038-5
Institute of Electrical and Electronics Engineers Inc.
Artificial intelligence; Cardiovascular diseases; Digital signal processing; FPGA; Medical device; Phonocardiogram; Point-of-care; Pre-processing
https://ieeexplore.ieee.org/document/10741821
none
Ragusa, D.; Rodriguez-Almeida, A. J.; Gazzoni, M.; Torti, E.; Marenzi, E.; Fabelo, H.; Callico, G. M.; Leporati, F.
273
info:eu-repo/semantics/conferenceObject
8
4 Contributo in Atti di Convegno (Proceeding)::4.1 Contributo in Atti di convegno
File in questo prodotto:
Non ci sono file associati a questo prodotto.

I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.

Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11571/1517355
Citazioni
  • ???jsp.display-item.citation.pmc??? ND
  • Scopus 0
  • ???jsp.display-item.citation.isi??? ND
social impact