A 12-bit successive-approximation register (SAR) analog-to-digital converter (ADC) in 180-nm CMOS is presented. Designed for the readout of inertial sensors in micro-electromechanical systems (MEMS) technology, it combines an asynchronous control scheme with a 2-bit per cycle architecture achieving enhanced energy efficiency. Operating at a 1-MS/s sampling rate, the proposed ADC draws 8.9-μA of total current from a 1.8-V supply. Additionally, it demonstrates an SNDR of 63.2 dB across the entire Nyquist bandwidth, resulting in a Walden figure-of-merit (FoM) of 13.6 fJ/conv-step. The achieved energy efficiency makes the proposed ADC suitable for battery-powered applications requiring medium resolution and data rate.
A 12-bit 1-MS/s 2-bit/cycle Asynchronous SAR ADC for MEMS Inertial Sensors Readout
Colombi A.
;Aprile A.;Bonizzoni E.;Malcovati P.
2025-01-01
Abstract
A 12-bit successive-approximation register (SAR) analog-to-digital converter (ADC) in 180-nm CMOS is presented. Designed for the readout of inertial sensors in micro-electromechanical systems (MEMS) technology, it combines an asynchronous control scheme with a 2-bit per cycle architecture achieving enhanced energy efficiency. Operating at a 1-MS/s sampling rate, the proposed ADC draws 8.9-μA of total current from a 1.8-V supply. Additionally, it demonstrates an SNDR of 63.2 dB across the entire Nyquist bandwidth, resulting in a Walden figure-of-merit (FoM) of 13.6 fJ/conv-step. The achieved energy efficiency makes the proposed ADC suitable for battery-powered applications requiring medium resolution and data rate.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
