This work presents a 28-to-38 GHz frequency tripler in 55-nm SiGe BiCMOS technology. An on-chip background calibration technique maximizes the output power, improving the fundamental harmonic rejection over wide input-frequency and input-power variations. The implemented tripler, which occupies an area of 0.4 mm2 and dissipates a power of 54 mW, achieves more than 40-dB fundamental harmonic rejection across a 3-dB bandwidth of 10.2 GHz (30.3%) and over 13 dB of input-power variation.
A 28-38 GHz Digitally-Assisted Frequency Tripler with Background Calibration in 55nm SiGe BiCMOS
Mazzanti, A.;
2025-01-01
Abstract
This work presents a 28-to-38 GHz frequency tripler in 55-nm SiGe BiCMOS technology. An on-chip background calibration technique maximizes the output power, improving the fundamental harmonic rejection over wide input-frequency and input-power variations. The implemented tripler, which occupies an area of 0.4 mm2 and dissipates a power of 54 mW, achieves more than 40-dB fundamental harmonic rejection across a 3-dB bandwidth of 10.2 GHz (30.3%) and over 13 dB of input-power variation.File in questo prodotto:
Non ci sono file associati a questo prodotto.
I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
