This paper describes a fully integrated low noise amplifier (LNA) + mixer + first filtering stage, suitable for direct conversion receivers. Its key feature is a current driven passive mixer loaded by a low impedance. Measurements performed on a 0.18 μm CMOS prototype, confirm that this architecture, when compared to a classic one, gives a much smaller flicker noise (70 kHz 1/f corner), together with an excellent noise figure (4.4 dB integrated from 10 kHz to 1.92 MHz), while requiring only 15 mW of power. Moreover, a very good linearity is simultaneously achieved (IIP3=-1 dBm). The main limitation of the present implementation is the bandwidth of the opamp that implements the mixer load. Due to this, IIP3 degrades at higher frequencies (IIP3 about -12 dBm at 10 MHz). This is however not a fundamental limitation.
A 15 mW, 70 kHz 1/f Corner Direct Conversion CMOS Receiver
CASTELLO, RINALDO;
2003-01-01
Abstract
This paper describes a fully integrated low noise amplifier (LNA) + mixer + first filtering stage, suitable for direct conversion receivers. Its key feature is a current driven passive mixer loaded by a low impedance. Measurements performed on a 0.18 μm CMOS prototype, confirm that this architecture, when compared to a classic one, gives a much smaller flicker noise (70 kHz 1/f corner), together with an excellent noise figure (4.4 dB integrated from 10 kHz to 1.92 MHz), while requiring only 15 mW of power. Moreover, a very good linearity is simultaneously achieved (IIP3=-1 dBm). The main limitation of the present implementation is the bandwidth of the opamp that implements the mixer load. Due to this, IIP3 degrades at higher frequencies (IIP3 about -12 dBm at 10 MHz). This is however not a fundamental limitation.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
