In this paper we present the implementation of a successful neurochip, the TotemNC3003 Twinchip by Neuricam, on an FPGA based board lodging the last generation Stratix device from Altera. We already evaluated the performance of the chip in typical neuronal applications, showing that it can outperform a PC, due also to the Reactive Tabu Search algorithm it implements during training and generalising phases. Now, aim of the project is to add a further acceleration degree, by employing a technology which allows to fully integrate the neural algorithm straight onto the hardware and to modify the chip architecture for a more efficient implementation of the neural elaboration.
The Totem neurochip: an FPGA implementation
DANESE, GIOVANNI;BERA, MARCO;LEPORATI, FRANCESCO;SPELGATTI, ALVARO
2004-01-01
Abstract
In this paper we present the implementation of a successful neurochip, the TotemNC3003 Twinchip by Neuricam, on an FPGA based board lodging the last generation Stratix device from Altera. We already evaluated the performance of the chip in typical neuronal applications, showing that it can outperform a PC, due also to the Reactive Tabu Search algorithm it implements during training and generalising phases. Now, aim of the project is to add a further acceleration degree, by employing a technology which allows to fully integrate the neural algorithm straight onto the hardware and to modify the chip architecture for a more efficient implementation of the neural elaboration.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
