A 6th order band-pass switched-capacitor (S. C.) filter that requires only 500 nA of total supply current has been designed and fabricated in a 2 /¿m CMOS technology. The filter is part of an implantable device powered by a ±li V battery, can drive up to 30 pF of capacitive load, and uses a 2 kHz master clock . Substantial reduction in the power consumption has been achieved by using a novel amplifier timeshar¬ ing technique which allows to realize an arbitrary number of biquadratic cells with only ruo amplifiers. Further power saving was obtained with the use of positive feedback in the amplifier input stage to enhance its transconductance. The prototype chip requires an area of 2200 mils .

A 500 nA 6th Order Bandpass S.C. FilterESSCIRC '89: Proceedings of the 15th European Solid-State Circuits Conference

CASTELLO, RINALDO;DONATI, SILVANO
1989-01-01

Abstract

A 6th order band-pass switched-capacitor (S. C.) filter that requires only 500 nA of total supply current has been designed and fabricated in a 2 /¿m CMOS technology. The filter is part of an implantable device powered by a ±li V battery, can drive up to 30 pF of capacitive load, and uses a 2 kHz master clock . Substantial reduction in the power consumption has been achieved by using a novel amplifier timeshar¬ ing technique which allows to realize an arbitrary number of biquadratic cells with only ruo amplifiers. Further power saving was obtained with the use of positive feedback in the amplifier input stage to enhance its transconductance. The prototype chip requires an area of 2200 mils .
1989
3854031017
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11571/456129
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