This paper deals with the realization of a high image rejection (IR) CMOS LNA, tailored to DECT applications. Two topologies are proposed. The first one makes use of a Q-enhancement circuit and provides 15 dB IR with 300 MHz IF, 4.5 dB NF and -13 dBm IIP3. A notch filter loads the second LNA. The results are the following: 30 dB IR, 5.5 dB NF and -10 dBm IIP3. In both cases the frequency control is performed by means of an integrated MOS varactor. These circuits prove to be suitable for highly integrated CMOS receivers employing wideband IF architecture. At the expense of an almost double current consumption with respect to classical LNA, they provide enough image rejection to get rid of off-chip image rejection filters
Solutions for image rejection CMOS LNA
SVELTO, FRANCESCO;CASTELLO, RINALDO;
2000-01-01
Abstract
This paper deals with the realization of a high image rejection (IR) CMOS LNA, tailored to DECT applications. Two topologies are proposed. The first one makes use of a Q-enhancement circuit and provides 15 dB IR with 300 MHz IF, 4.5 dB NF and -13 dBm IIP3. A notch filter loads the second LNA. The results are the following: 30 dB IR, 5.5 dB NF and -10 dBm IIP3. In both cases the frequency control is performed by means of an integrated MOS varactor. These circuits prove to be suitable for highly integrated CMOS receivers employing wideband IF architecture. At the expense of an almost double current consumption with respect to classical LNA, they provide enough image rejection to get rid of off-chip image rejection filtersI documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
