This letter presents a 2-Mb embedded phase change memory (ePCM) macrocell designed in 90-nm BJT-CMOS-DMOS (BCD) technology able to address the next generation of automotive and smart-power products exploiting an ePCM cell based on a Ge-rich chalcogenide alloy. The optimized memory allows 16-ns random access time and 5-Mbit/s write throughput from -40 °C to 175 °C,with 100 kcycle endurance. The sense amplifier,the programming circuitry,and the data processing logic able to meet automotive requirements are described. The silicon results are provided.

2-Mb embedded phase change memory with 16-ns read access time and 5-Mb/s write throughput in 90-nm BCD technology for automotive applications

Zurla R.
;
Cabrini A.;Torelli G.;
2019-01-01

Abstract

This letter presents a 2-Mb embedded phase change memory (ePCM) macrocell designed in 90-nm BJT-CMOS-DMOS (BCD) technology able to address the next generation of automotive and smart-power products exploiting an ePCM cell based on a Ge-rich chalcogenide alloy. The optimized memory allows 16-ns random access time and 5-Mbit/s write throughput from -40 °C to 175 °C,with 100 kcycle endurance. The sense amplifier,the programming circuitry,and the data processing logic able to meet automotive requirements are described. The silicon results are provided.
978-1-7281-1550-4
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11571/1343984
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