IRIS
CABRINI, ALESSANDRO
 Distribuzione geografica
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Continente #
NA - Nord America 2289
EU - Europa 2202
AS - Asia 1277
AF - Africa 5
SA - Sud America 4
OC - Oceania 3
Totale 5780
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Nazione #
US - Stati Uniti d'America 2277
CN - Cina 1262
IE - Irlanda 904
UA - Ucraina 346
DE - Germania 204
FI - Finlandia 203
IT - Italia 184
SE - Svezia 147
GB - Regno Unito 110
BE - Belgio 47
FR - Francia 34
CA - Canada 12
NL - Olanda 6
RU - Federazione Russa 6
BR - Brasile 4
HK - Hong Kong 4
IR - Iran 4
MU - Mauritius 4
AU - Australia 3
RO - Romania 3
CH - Svizzera 2
MY - Malesia 2
PL - Polonia 2
AM - Armenia 1
AT - Austria 1
DZ - Algeria 1
ES - Italia 1
GR - Grecia 1
IN - India 1
KR - Corea 1
LV - Lettonia 1
SA - Arabia Saudita 1
TR - Turchia 1
Totale 5780
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Città #
Dublin 902
Chandler 700
Jacksonville 457
Nanjing 361
Nanchang 173
Ann Arbor 156
Beijing 140
Shenyang 118
Princeton 117
Lawrence 112
Medford 104
Wilmington 97
Hebei 95
Changsha 93
Jiaxing 88
Hangzhou 61
Boardman 57
Tianjin 55
Brussels 45
Woodbridge 43
Milan 41
Pavia 34
Des Moines 22
Norwalk 22
Verona 18
Helsinki 16
Duncan 14
Fairfield 13
Kunming 10
Redwood City 10
Toronto 10
Jinan 8
Ningbo 8
Zhengzhou 8
Dearborn 7
Houston 7
Los Angeles 7
Somma Lombardo 7
Taizhou 6
Guangzhou 5
Hanover 5
Shanghai 5
Cardano 4
Lanzhou 4
Neubiberg 4
Orange 4
Alba 3
Auburn Hills 3
Bucharest 3
Florence 3
Menlo Park 3
Monmouth Junction 3
Aachen 2
Abbiategrasso 2
Ardabil 2
Ashburn 2
Castano Primo 2
Cedar Knolls 2
Hefei 2
Lomazzo 2
Marseille 2
Melbourne 2
Piemonte 2
Redmond 2
Rome 2
Rovellasca 2
São Paulo 2
Vigasio 2
Walnut 2
Acqui Terme 1
Augusta 1
Berlin 1
Biella 1
Bloomfield 1
Borås 1
Calgary 1
Changchun 1
Geislingen an der Steige 1
Gothenburg 1
Groningen 1
Haikou 1
Halle 1
Kraków 1
Las Vegas 1
Lausanne 1
Mansfield 1
Mountain View 1
New Delhi 1
Padova 1
Pittsburgh 1
Rosental 1
Salt Lake City 1
San Francisco 1
Santa Clara 1
Seattle 1
Stella 1
Tomsk 1
Vitória 1
Woluwé-saint-lambert 1
Yerevan 1
Totale 4356
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Nome #
A 0.13-µm CMOS NOR Flash memory experimental chip for 4-b/cell digital storage 113
A 1 V, 26 µW extended temperature range band-gap reference in 130-nm CMOS technology 94
High-efficiency CMOS charge pump 80
A theoretical discussion on performance limits of CMOS charge pumps 80
On-wafer integrated system for fast characterization and parametric test of new-generation Non Volatile Memories 78
On the effect of cell geometry on the amorphization process in phase-change memories 76
A 1.2 V sense amplifier for high-performance embeddable NOR Flash memories 75
Data retention of partial-SET states in phase change memories 75
CMOS discrete-time chaotic circuit for low-power embedded cryptosystems 74
Effects of alloy composition on multilevel operation in self-heating Phase Change Memories 74
Impact of parasitic elements on CMOS charge pumps: a numerical analysis 73
On-wafer analog pulse generator for fast characterization and parametric test of resistive switching memories 73
A Very Fast and Low-power Time-discrete Spread-spectrum Signal Generator 71
Cancellation of Amplifier Offset and 1/f Noise: An Improved Chopper Stabilized Technique 71
Method for multilevel programming of phase change memory cells using adaptive reset pulses 71
Theoretical analysis of the RESET operation in phase-change memories 71
Design of maximum-efficiency integrated voltage doubler 70
Modeling of partial-RESET dynamics in Phase Change Memories 70
A charge transfer scheme for efficiency optimization in integrated charge pumps 69
A discussion on exponential gain charge pump 68
A novel programming technique to boost low-resistance state performance in Ge-rich GST Phase Change Memory 68
Efficiency comparison between doubler and Dickson charge pumps 65
A bipolar-selected phase-change memory featuring multi-level cell storage 65
Voltage-driven multilevel programming in phase change memories 64
Algorithm for automatic design of maximum-efficiency Dickson charge pumps 64
A compact low-cost test equipment for thermal and electrical characterization of integrated circuits 64
A small-size, fast-settling, low-cost thermal regulator for chip surface measurements 63
Temperature dependence of the programmed states in GST-based multilevel phase-change memories 63
A 32-KB ePCM for real-time data processing in automotive and smart power applications 63
Theoretical and experimental analysis of Dickson charge pump output resistance 62
Thermal regulator for IC temperature characterization using a microprobe station 61
Effect of technology scaling on program and read window in phase change memories 61
Impact of control signal non-idealities on two-phase charge pumps 60
Sound representation in higher language areas during language generation. 60
A test chip for contact and via failure analysis for 90-nm copper interconnect CMOS technology 59
Improved charge pump for Flash memory applications in triple-well CMOS technology 59
A versatile and compact USB system for electrical and thermal characterization of non-volatile memories 58
High-accuracy program scheme for multilevel Flash memories 58
Programming a multilevel phase change memory cell 58
Statistical modeling of bit distributions in phase change memories 57
Temperature tracking current reference for multilevel phase-change memories 57
Enhanced charge pump for ultra-low-voltage applications 57
Voltage gain analysis of integrated Fibonacci-like charge pumps for low-power applications 57
Challenges and opportunities for information theory-based design of Phase Change Memories 57
Use of the non-linear Chua's circuit for on-line offset calibration of ADC 56
Low-field resistance drift in partial-SET states in Phase Change Memories 56
Transient effects in partial-RESET programming of phase change memory cells 56
High input range sense comparator for multilevel Flash memories 56
A circuit for linearly decreasing temperature SET programming of PCM based on Ge-rich GST 56
High-swing buffer for programmable resistive memories 56
Current pulse generator for multilevel cell programming of innovative PCM 56
Impact of control signal skews on self-boosted charge pumps 55
Power efficiency evaluation in Dickson and voltage doubler charge pump topologies 55
A theoretical charge transfer scheme for efficiency optimization of integrated charge pumps 55
A failure analysis test structure for deep sub-micron CMOS copper interconnect technologies 54
A 32KB 18ns random access time embedded PCM with enhanced program throughput for automotive and smart power applications 54
Experimental analysis of partial-SET state stability in phase change memories 54
On-Line Calibration of Offset and Gain Mismatch in Time-Interleaved ADC Using a Sampled-Data Chaotic Bit-Stream 53
An integrated multi-physics approach to the modeling of a phase-change memory device 53
High-efficiency regulator for on-chip charge pump voltage elevators 53
Impact of technology scaling of phase-change memory performance 53
Current reference scheme for multilevel Phase-Change Memory sensing 53
Experimental evaluation of a low-power sense comparator for multilevel Flash memories 53
Trade-off between SET and data retention performance thanks to innovative materials for Phase-Change Memory 52
Compact model for phase change memory cells 52
Dependence of resistance drift on the amorphous cap size in phase change memory arrays 51
Method for designing integrated charge pumps with minimum area 51
Feasibility study of partial-RESET multilevel programming in Phase Change Memories 51
On voltage-driven multilevel programming in phase change memory cells 51
Temperature study of high-drive capability buffer for Phase Change Memories 51
Drift-driven investigation of phase distribution in Phase-Change Memories 51
Voltage-mode closed-loop sense amplifier for multilevel Flash memories 50
Novel test strategy for statistical evaluation of defect density and reliability of contacts and vias 50
A test structure for contact and via failure analysis in deep-submicrometer CMOS technologies 49
Analysis of array biasing in crosspoint memories for leakage power minimization 49
High-efficiency control structure for CMOS Flash memory charge pumps 48
SET Performance Improvement in Phase Change Memory Based on Innovative materials Featuring High Temperature Data Retention 47
Intrinsic program instability in HfO2 RRAM and consequences on program algorithms 47
Algorithms to survive: programming operation in non-volatile memories 47
A charge pump with enhanced charge transfer for energy harvesting applications 47
Development and Analysis of a PCB Vector 2-D Magnetic Field Sensor System for Electronic Compasses 47
Single-ended phase-change memory device and reading method 46
Leakage-resilient memory-based physical unclonable function using phase change material 45
Optimal programming with voltage-controlled temperature profile to reduce SET state distribution dispersion in PCM 45
Optimized temperature profile based pulse generator for innovative Phase Change Memory 45
A comprehensive Verilog-A behavioral model of Spin-Transfer Torque memory cell 44
System and method for a multistage operational amplifier 44
Exploiting process variations and programming sensitivity of Phase Change Memory for reconfigurable physical unclonable functions 43
Automatic trimming procedure to enhance the accuracy of on-chip analog pulse generators 43
Tracking of the speech envelope by neural activity during speech production is not limited to Broca's area in the dominant frontal lobe 42
High-drive capability buffer for highly variable resistive loads 42
Enhanced voltage buffer compensation technique for two-stage CMOS operational amplifiers 42
A variability-aware analysis and design guideline for write and read operations in crosspoint STT-MRAM arrays 42
On-chip error correcting techniques for new-generation flash memories 41
Voltage-driven partial-RESET multilevel programming in phase-change memories 41
Optimization of low-resistance state performance in Ge-rich GST Phase Change Memory 41
Program and read scaling trade-offs in phase change memories 40
A multi-level-cell bipolar-selected phase-change memory 38
Integrated charge pumps: a generalized method for power efficiency optimization 37
Bandwidth optimization of CMOS two-stage operational amplifiers under power consumption and area constraints 36
Totale 5711
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Categoria #
all - tutte 11664
article - articoli 0
book - libri 0
conference - conferenze 0
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 0
Totale 11664
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Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2017/201898 0000 00 00 088100
2018/2019383 391367 90 9712 8214410
2019/20201535 415645068 664 2776 41211063
2020/2021692 96581574 680 15117 291038118
2021/2022577 471911 939 2333 253681290
2022/20232102 19919616147 177214 7108 1038000
Totale 6053