IRIS
SPEZIALI, VALERIA
 Distribuzione geografica
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Continente #
NA - Nord America 2.499
EU - Europa 2.162
AS - Asia 1.322
AF - Africa 8
Continente sconosciuto - Info sul continente non disponibili 3
OC - Oceania 3
Totale 5.997
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Nazione #
US - Stati Uniti d'America 2.477
CN - Cina 1.302
IE - Irlanda 559
UA - Ucraina 494
FI - Finlandia 295
SE - Svezia 266
DE - Germania 222
GB - Regno Unito 124
IT - Italia 115
FR - Francia 54
CA - Canada 22
BE - Belgio 16
IN - India 11
RU - Federazione Russa 7
NL - Olanda 6
MU - Mauritius 5
HK - Hong Kong 4
EU - Europa 3
CH - Svizzera 2
DZ - Algeria 2
IR - Iran 2
NZ - Nuova Zelanda 2
AU - Australia 1
CZ - Repubblica Ceca 1
ES - Italia 1
ID - Indonesia 1
MY - Malesia 1
SG - Singapore 1
ZA - Sudafrica 1
Totale 5.997
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Città #
Dublin 559
Chandler 552
Jacksonville 530
Nanjing 428
Nanchang 155
Ashburn 132
Princeton 118
Shenyang 117
Lawrence 115
Wilmington 112
Medford 110
Hebei 106
Jiaxing 96
Changsha 95
Boardman 85
Ann Arbor 82
Hangzhou 79
Tianjin 75
Helsinki 65
Milan 54
Beijing 47
Woodbridge 38
Verona 31
Des Moines 19
Toronto 19
Norwalk 18
Shanghai 15
Brussels 14
Auburn Hills 13
Fairfield 12
Los Angeles 12
Ningbo 11
Jinan 10
New York 10
Seattle 10
Zhengzhou 9
Kunming 8
West Jordan 8
Augusta 7
Meda 7
Pavia 7
Taizhou 7
Fuzhou 6
Guangzhou 6
Houston 6
Lanzhou 4
Leawood 4
London 4
Pune 4
Changchun 3
Phoenix 3
Washington 3
Abbiategrasso 2
Andover 2
Ardabil 2
Bangalore 2
Bergamo 2
Cedar Knolls 2
Chicago 2
Duncan 2
Haikou 2
Hasselt 2
Las Vegas 2
Taiyuan 2
Arnsberg 1
Auckland 1
Benevento 1
Bengaluru 1
Berlin 1
Birmingham 1
Bologna 1
Borås 1
Boulder 1
Canberra 1
Dallas 1
Dalmine 1
Edmonton 1
Enschede 1
Geneva 1
Kemerovo 1
Loughton 1
Mansfield 1
Massapequa 1
Monmouth Junction 1
Montréal 1
Muizenberg 1
Orange 1
Parma 1
Pasuruan 1
Pinehaven 1
Prague 1
Redmond 1
Rockville 1
San Jose 1
San Mateo 1
Segrate 1
Singapore 1
Southend 1
Tappahannock 1
Thousand Oaks 1
Totale 4.100
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Nome #
0.13 um CMOS technologies for radiation hardness analog front-end circuits in LHC upgrades 159
Design hints for best noise and signal behaviour in DMILL amplifiers 98
Design and characterization of integrated front-end transistors in a microstrip detector technology 77
Experimental study and modeling of white noise sources in submicron P and N-MOSFETs 76
Effects induced by gamma-radiation on P and N-channel junction field effect transistors 74
The BABAR Detector 72
CMOS MAPS with pixel level sparsification and time stamping capabilities for applications at the ILC 72
130 and 90 nm CMOS technologies for detector front-end applications 70
Noise performance of 0.13 μm CMOS technologies for detector front-end applications 70
Noise limits of AToM, a 128 channel CMOS readout chip in applications with room temperature high granularity detectors 68
The analog signal processor of the auger fluorescence detector prototype 68
Deep submicron CMOS transistors for low-noise front-end systems 68
CMOS technologies in the 100 nm range for rad-hard front-end electronics in future collider experiments. 67
Impact of Lateral Isolation Oxides on Radiation-Induced Noise Degradation in CMOS Technologies in the 100-nm Regime 66
The analog signal processing system for the Auger fluorescence detector prototype 66
Proton induced damage in JFET transistors and charge preamplifiers on high-resistivity silicon 65
Noise Behavior of a 180 nm CMOS SOI Technology for Detector Front-End Electronics 65
The analog signal processing system for the Auger fluorescence detector prototype 65
A 4096-pixel MAPS device with on-chip data sparsification 65
Low-noise design criteria for detector readout systems in deep submicron CMOS technology 64
Noise characterization of 130 nm and 90 nm CMOS technologies for analog front-end electronics 63
Response of SOI bipolar transistors exposed to gamma-rays under different dose rate and bias conditions 63
Radiation tolerance of a 0.18 um CMOS process 62
2D and 3D thin pixel technologies for the Layer0 of the SuperB Silicon Vertex Tracker 62
A novel monolithic active pixel detector in 0.13 μm triple well CMOS technology with pixel level analog processing 61
Integrated front-end electronics in a detector compatible process: source-follower and charge-sensitive preamplifier configuration 61
Development of a detector for bunch by bunch measurements and optimization of luminosity in the LHC 61
Bulk damage in proton irradiated JFET transistors and charge preamplifiers on high resistivity silicon 60
CMOS MAPS with fully integrated, hybrid-pixel-like analog front-end electronics 60
Fabrication of Microstrip Detectors and Integrated Electronics on High Resistivity Silicon 60
The high rate data acquisition system for the SLIM5 beam test 60
An ionization chamber shower detector for the LHC luminosity monitor 60
“Complementi al corso di Strumentazione e Misure Elettroniche “. 60
Noise performances of 0.13 um CMOS technologies for detector front-end applications 59
JFET-CMOS Microstrip Front-end 58
Noise degradation induced by γ-rays on P- and N-channel junction field-effect transistors 58
The associative memory for the self-triggered SLIM5 silicon telescope 58
Monolithic pixel detectors in a 0.13 um CMOS technology with sensor level continuous time charge amplification and shaping 58
The superB silicon vertex tracker 58
Deep n-well MAPS in a 130 nm CMOS technology: Beam test results 58
Instrumentation for noise measurements on CMOS transistors for fast detector preamplifiers 57
JFET preamplifiers with different reset techniques on detector-grade high-resistivity silicon 57
Radiation hardness study of proton irradiated SOI bipolar transistors 56
MAPS in 130 nm triple well CMOS technology for HEP applications 56
Beam-test results of 4k pixel CMOS MAPS and high resistivity striplet detectors equipped with digital sparsied readout in the Slim5 low mass silicon demonstrator 56
Evolution in the criteria that underlie the design of a monolithic preamplifier system for microstrip detectors 56
A new approach to the design of monolithic active pixel detectors in 0.13 um triple well CMOS technology 55
A study for the detection of ionizing particles with phototransistors on thick high-resistivity silicon substrates 55
Recent development on triple well 130 nm CMOS MAPS with in-pixel signal processing and data sparsification capability 55
Vertex detector for the SuperB Factory 55
Impact of gate-leakage current noise in sub-100 nm CMOS front-end electronics 54
Initial test results of an ionization chamber shower detector for a LHC luminosity monitor 54
Resolution limits achievable with CMOS front-end in X and gamma-ray analysis with semiconductor detectors 54
An ionization chamber shower detector for the LHC luminosity monitor 54
Optimization of signal extraction and front-end design in a fast, multigap ionization chamber 53
On the design of a JFET-CMOS front-end for low noise data acquisition from microstrip detectors 53
Total Ionizing Dose Effects on the Noise Performances of a 0.13 um CMOS Technology 53
Feasibility studies of microelectrode silicon detectors with integrated electronics 53
Effects of gamma-rays on JFET devices and circuits fabricated in a detector-compatible process 53
Recent developments in 130 nm CMOS monolithic active pixel detectors 52
On-chip fast data sparsication for a monolithic 4096-pixel device 52
Electrical Design Considerations for a 40 MHz Gas Ionization Chamber 51
Noise analysis of NPN SOI bipolar transistors for the design of charge measuring systems 51
Development of a triple well CMOS MAPS device with in-pixel signal processing and sparsified readout capabilities 51
The readout of the LHC beam luminosity monitor: accurate shower energy measurements at a 40MHz repetition rate 51
Recent results from the development of silicon detectors with integrated electronics 50
Thin pixel development for the SuperB silicon vertex tracker 50
Proton induced damage in JFET transistors and charge preamplifiers on high-resistivity silicon 50
Gamma-ray response of SOI bipolar junction transistors for fast, radiation tolerant front-end electronics 50
Radiation hardness perspectives for the design of analog detector readout circuits in the 0.18 um CMOS generation 50
Development of 130 nm CMOS monolithic active pixels with in-pixel signal processing 49
On some aspects of suboptimal filtering applied to f^0, f^1 and f^2 noise terms in charge measurements 49
A fabrication process for silicon microstrip detectors with integrated front-end electronics 49
Design criteria for low-noise front-end electronics in the 0.13 um CMOS generation 49
Non-standard approach to charge signal processing in CMOS MAPS for charged particle trackers 48
Submicron CMOS technologies for low-noise analog front-end circuits 48
Beam test results of different configurations of deep N-well MAPS matrices featuring in pixel full signal processing 48
The SuperB silicon vertex tracker 48
Noise behavior under gamma-irradiation of 0.35 um CMOS transistors 48
A microstrip preamplifier system based on a low noise radiation hard innovative technology 48
“Extremely low noise amplifier for interfacing active devices to instruments for spectral analysis 47
The SLIM5 low mass silicon tracker demonstrator 47
Deep N-well CMOS MAPS with in-pixel signal processing and sparsification capabilities for the ILC vertex detector 47
Pixel-level continuous-time analog signal processing for 130 nm CMOS MAPS 47
Survey of noise performances and scaling effects in deep submicron CMOS devices from different foundries 47
Perspectives for low noise detector readout in a sub-quarter-micron CMOS SOI technology 46
Triple well CMOS active pixel sensor with in-pixel full signal analog processing 46
Ionizing radiation effects on JFET devices and circuits fabricated in a detector-compatible process 45
Proposal of a sparsification circuit for mixed-mode MAPS detectors 45
Development of deep N-well MAPS in a 130 nm CMOS technology and beam test results on a 4k-pixel matrix with digital sparsified readout 45
Optimization of signal extraction and front-end design in a fast, multigap ionization chamber 45
Design and performance of analog circuits for DNW-MAPS in 100-nm-scale CMOS technology 45
Monolithic JFET preamplifier with nonresistive charge reset 44
Fermilab silicon strip readout chip for BTeV 44
JFET front-end circuits integrated in a detector-grade silicon substrate 44
Development of deep N-well monolithic active pixel sensors in a 0.13 um CMOS technology 43
“Low Noise, High Radiation Hardness Front-End Circuits Based Upon an Upgraded JFET Monolithic Process”. 42
“Preamplifiers for Room Temperature and Cryogenic Applications Based on DMILL Technology” 42
Comparison of ionizing radiation effects in 0.18 and 0.25 um CMOS technologies for analog applications 41
JFET front-end circuits integrated in a detector-grade silicon substrate 41
Totale 5.669
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Categoria #
all - tutte 19.754
article - articoli 0
book - libri 0
conference - conferenze 0
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 0
Totale 19.754
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Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2018/201939 0 0 0 0 0 0 0 0 0 2 3 34
2019/20201.581 469 684 0 88 3 89 8 91 2 95 51 1
2020/2021827 93 73 27 88 4 122 3 116 28 132 111 30
2021/2022547 2 4 20 16 23 34 10 18 39 48 76 257
2022/20231.614 176 87 6 135 203 188 0 85 672 6 38 18
2023/2024466 53 148 14 28 62 107 4 25 3 22 0 0
Totale 6.150